Multicycle Processor
Digital Electronics & Computer Engineering (E85)
A multicycle processor built from scratch in SystemVerilog, with its own datapath and control state machine.
Overview
For the final lab of E85, I built a multicycle processor in SystemVerilog. A multicycle design breaks each instruction into steps (fetch, decode, execute, memory, write-back) and reuses one ALU and one memory across those steps, with a finite state machine sequencing the datapath.
More details and diagrams are coming soon.